Which of the following operations would count as intrusive to normal processor operation?
To return from a Data Abort handler and re-execute the aborting instruction, what value should be loaded to the PC?
When timing a critical function for an algorithm, using platform time functions such as get time of day (), the result is unpredictable; there is significant variance in the measured time between different runs of the benchmark. Which of the following strategies would improve the accuracy of the measurement?
A C code segment contains three calls to a function, foobar ().
This code segment is to be linked with a static library that defines foobar ().
Ignoring inlining, how many copies of foobar () will the ARM linker place in the output?
Which of the following statements best describes a Board Support Package (BSP)?
What are the values of the NZCV bits in the CPSR after executing the following instructions?
LDR R0, = 0xFFFFFFFF
ADDS R0, R0, #1
Which of the following memory attributes, specified in a translation table entry, could be used to protect a page containing a read-sensitive peripheral from speculative instruction fetches?
An external debugger would need to clean the contents of the processor data cache in which of the following cases?
In which of the following scenarios would cache maintenance operations be necessary in an ARMv7 system?
Is it possible to use an interrupt controller based on the Generic Interrupt Controller (GIC) architecture in a device built around a single core Cortex-A9 MPCore processor?
TESTED 22 Feb 2025
